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 N-CHANNEL 200V - 0.062 - 34A TO-247 PowerMESHTM MOSFET
Table 1. General Features
Type STW34NB20 VDSS 200 V RDS(on) < 0.075 ID 34 A
STW34NB20
Figure 1. Package
FEATURES SUMMARY TYPICAL RDS(on) = 0.062

EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED
TO-247
1 3 2
DESCRIPTION Using the latest high voltage MESH OVERLAYTM process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company's proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. APPLICATIONS SWITCH MODE POWER SUPPLIES (SMPS)
Figure 2. Internal Schematic Diagram
DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE HIGH CURRENT, HIGH SPEED SWITCHING
Table 2. Order Codes
Part Number STW34NB20 Marking W34NB20 Package TO-247 Packaging TUBE
REV. 2 April 2004 1/10
STW34NB20
Table 3. Absolute Maximum Ratings
Symbol VDS VDGR VGS ID ID IDM
(1)
Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (RGS = 20 k) Gate-source Voltage Drain Current (cont.) at TC = 25 C Drain Current (cont.) at TC = 100 C Drain Current (pulsed) Total Dissipation at TC = 25 C Derating Factor
Value 200 200 30 34 21 136 180 1.44 -65 to 150 150
Unit V V V A A A W W/C C C
Ptot
Tstg Tj
Storage Temperature Max. Operating Junction Temperature
Note: 1. Pulse width limited by safe operating area
Table 4. Thermal Data
Symbol Rthj-case Rthj-amb Tl Parameter Thermal Resistance Junction-case Thermal Resistance Junction-ambient Max Max Value 0.69 30 300 Unit C/W C/W C
Maximum Lead Temperature For Soldering Purpose
Table 5. Avalanche Characteristics
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max, < 1%) Single Pulse Avalanche Energy (starting Tj = 25 C; ID = IAR; VDD = 50 V) Max Value 34 650 Unit A mJ
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ELECTRICAL CHARACTERISTICS (Tcase = 25C unless otherwise specified) Table 6. Off
Symbol V(BR)DSS IDSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) IGSS Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A VGS = 0 VDS = Max Rating VDS = Max Rating Tc = 125 C VGS = 30 V Min. 200 1 10 100 Typ. Max. Unit V A A nA
Table 7. On (1)
Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS; ID = 250 A VGS = 10V; ID = 17 A Min. 3 Typ. 4 0.062 Max. 5 0.075 Unit V
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %
Table 8. Dynamic
Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max; ID = 17 A VDS = 25 V; f = 1 MHz; VGS = 0 Min. 8 Typ. 17 2400 650 90 3300 900 130 Max. Unit S pF pF pF
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %
Table 9. Switching On
Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 100 V; ID = 17 A; RG = 4.7 VGS = 10 V (see test circuit, Figure 16) VDD = 160 V; ID = 34 A; VGS = 10 V Min. Typ. 30 40 60 19 29 Max. 40 55 80 Unit ns ns nC nC nC
Table 10. Switching Off
Symbol tr(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 160 V; ID = 34 A; RG = 4.7 VGS = 10 V (see test circuit, Figure 18) Min. Typ. 17 18 35 Max. 23 24 47 Unit ns ns ns
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STW34NB20
Table 11. Source Drain Diode
Symbol ISD ISDM (1) VSD (2) trr Qrr IRRAM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse RecoveryCharge Reverse RecoveryCharge ISD = 34 A; VGS = 0 ISD = 34 A; di/dt = 100 A/s VDD = 50 V; Tj = 150 C (see test circuit, Figure 18) Test Conditions Min. Typ. Max. 34 136 1.5 290 2.7 18.5 Unit A A V ns C A
Note: 1. Pulse width limited by safe operating area 2. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %
Figure 3. Safe Operating Area
Figure 4. Thermal Impedance
Figure 5. Output Characteristics
Figure 6. Transfer Characteristics
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STW34NB20
Figure 7. Transconductance Figure 8. Static Drain-source On Resistance
Figure 9. Gate Charge vs Gate-source Voltage
Figure 10. Capacitance Variations
Figure 11. Normalized Gate Thresold Voltage vs Temperature
Figure 12. Normalized On Resistance vs Temperature
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STW34NB20
Figure 13. Source-drain Diode Forward Characteristics
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STW34NB20
Figure 14. Unclamped Inductive Load Test Circuit Figure 15. Unclamped Inductive Waveforms
Figure 16. Switching Times Test Circuits For Resistive Load
Figure 17. Gate Charge Test Circuit
Figure 18. Test Circuit For Inductive Load Switching And Diode Recovery Times
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STW34NB20
PACKAGE MECHANICAL Table 12. TO-247 Mechanical Data
Symbol A A1 b b1 b2 c D E e L L1 L2 OP OR S 3.55 4.50 5.50 14.20 3.70 18.50 3.65 5.50 0.140 0.177 0.216 millimeters Min 4.85 2.20 1.0 2.0 3.0 0.40 19.85 15.45 5.45 14.80 4.30 0.560 0.14 0.728 0.143 0.216 Typ Max 5.15 2.60 1.40 2.40 3.40 0.80 20.15 15.75 Min 0.19 0.086 0.039 0.079 0.118 0.015 0.781 0.608 0.214 0.582 0.17 inches Typ Max 0.20 0.102 0.055 0.094 0.134 0.03 0.793 0.620
Figure 19. TO-247 Package Dimensions
Note: Drawing is not to scale.
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STW34NB20
REVISION HISTORY Table 13. Revision History
Date January-1998 14-Apr-2004 Revision 1 2 First Issue Stylesheet update. No content change. Description of Changes
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2004 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States www.st.com
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